# Jack Barnard - Real-Time Digital Clock [GitHub]

Date Created: 2026-06-17
Last Modified: 2026-08-21

This project implements a hardware-based real-time digital clock in SystemVerilog, designed specifically for deployment on the Terasic DE1-SoC FPGA board. The system utilizes the board's 50 MHz onboard oscillator, dividing the clock frequency down to drive precise 1-second counting logic for tracking hours, minutes, and seconds.

The digital clock features full configuration capabilities using the board's physical inputs. Push buttons and toggle switches allow for setting the current time, adjusting hours and minutes independently, and toggling between 12-hour and 24-hour display modes. To ensure reliable user input, button signals are passed through synchronizers and edge-detection logic to eliminate mechanical contact bounce.

Output multiplexing logic drives six onboard seven-segment LED displays to show hours, minutes, and seconds in real-time. Additionally, during time-setting modes, flashing segment logic provides visual feedback for the digit currently being adjusted.